I am wondering if Rice’s theorem (or something similar to that) applies also to sequential circuits. I.e. given any finite sequential circuit, can there be an algorithm that can formally verify any property of this circuit? I’m thinking yes, because the number of latches is bounded, so is the number of states. Even if the input is unbounded, at some point you have to arrive at a state that you’ve already seen before.
What are the limits of model-checking sequential circuits?